Achronix Chief Technologist, Nijssen, to Present on Maximizing External Memory Bandwidth Efficiency at FPGA Conference Europe

Press Releases Date

Santa Clara, Calif., June 28, 2022Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, announces Vice President and Chief Technologist Raymond Nijssen will present the paper, Maximize External Memory Bandwidth Efficiency with Any Access Pattern, at FPGA Conference Europe 2022 — an in-person event focused on user-oriented, practically applicable solutions and best practices in FPGAs. Come meet Achronix at our booth or contact us to arrange a meeting prior to the show.

What

Presentation

Wednesday, July 6, 9:45am–10:30am CET
Track 2: Board-Level & Connectivity

Maximize External Memory Bandwidth Efficiency with Any Access Pattern – Raymond Nijssen, VP and Chief Technologist, Achronix

This presentation details how to manage bandwidth limitations and leverage FPGA features to achieve effective DRAM bandwidth efficiency close to the theoretical upper limit, even with worst-case access patterns. The presentation showcases how this level of bandwidth efficiency can be easily achieved with practical FPGA designs using the GDDR6 memory subsystem and high-bandwidth 2D NoC found in Achronix Speedster7t FPGAs.

Find the agenda at www.fpga-conference.eu/agenda.

Visit Us in Booth 9

Achronix will be showcasing FPGA technologies built for acceleration of AI, ML, networking, data center automotive and other HPC applications:

  • Speedster®7t FPGAs – high-performance FPGAs with a 2D network on chip. Delivers ASIC-level performance with the full programmability of FPGAs.
  • Speedcore™ eFPGA IP – Over 15 million eFPGA IP cores shipped. Brings the performance and flexibility of programmable logic to ASICs and SoCs.
  • VectorPath® Accelerator Cards – PCIe accelerator cards for rapid prototyping and production. Offers 400G Ethernet, PCIe Gen4 and 4 Tbps of GDDR6 memory bandwidth.

Live Demonstrations

Stop by our booth for a demonstration of our two-dimensional network on chip (2D NoC). Truly 2D, the Speedster NoC has access points located throughout the FPGA core that provide an aggregate of 20 Tbps of bandwidth for interfacing to off-chip resources such as GDDR6 and DDR4 memories, PCI Express interfaces and 400G Ethernet ports, internal hard IP blocks such as the machine learning processors and the FPGA fabric itself.

When/Where

FPGA Conference Europe takes place July 5–7 at NH München Ost Conference Center. Find out more at www.fpga-conference.eu.

About Achronix Semiconductor Corporation

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-end FPGA-based data acceleration solutions, designed to address high-performance, compute-intensive and real-time processing applications. Achronix is the only supplier to have both high-performance, high-density standalone FPGAs and licensed eFPGA IP solutions. Achronix Speedster®7t FPGA and Speedcore™ eFPGA IP offerings are further enhanced by ready-to-use VectorPath® accelerator cards targeting AI, machine learning, networking and data center applications. All Achronix products are fully supported by the Achronix Tool Suite which enables customers to quickly develop their own custom applications.

Achronix has a global footprint, with sales and design teams across the U.S., Europe and Asia.

Follow Achronix

Website: www.achronix.com
The Achronix Blog: https://www.achronix.com/blogs/
LinkedIn: https://www.linkedin.com/company/achronix-semiconductor
YouTube: https://www.youtube.com/user/AchronixCorp

Contacts

Jay Aggarwal
Achronix Semiconductor Corporation 
408-889-4100
jayaggarwal@achronix.com


Achronix, Speedster and VectorPath are registered trademarks, and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other trademarks are the property of their prospective owners.