
The Speedster22i HD1000 has 64 lanes of Serializer/DeSerializer (SerDes) Lanes. Built with a highly digital architecture, the 12.75 Gbps SerDes and programmable PCS enable a wide variety of protocols to be implemented. With excellent jitter characteristics across a wide frequency range, the Achronix 12.75 Gbps SerDes is unrivaled by any other FPGA.
The Digital Architecture provides:
Achronix is now shipping the first Speedster22i FPGAs. Speedster22i devices are built on Intel’s 22nm process technology featuring 3-D Tri-Gate transistor technology. The Speedster22i HD1000 has over 1 million effective look-up-tables (LUT) and includes a wide range of hardened interface IP, which lowers power, cost and design time compared with other high end FPGAs.
The supported hard IP interfaces are: