Blog Posts

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  • 2018
  • 2017
  • How Big Should your eFPGA be? Here are Some Hints. June 29, 2018 by Volkan, Oktem

    Once you’ve made the correct decision to add Speedcore eFPGA IP to your ASIC or SoC design, the next question you’ll need to answer is how large to make the eFPGA. That’s a multi-dimensional question because Speedcore eFPGAs contain many types of blocks including: LUTs – grouped together in reconfigurable logic blocks (RLBs) along with MUXes, registers, and 4-bit ALUs BRAMs – dual-ported, 20Kb block RAMs LRAMs – single-ported, 4Kb logic RAMs DSP64 math units You’ll need to decide how many of each type of block you’ll need to implement your application(s) within your overall ASIC or SoC design. Once you make those decisions, Achronix …

    When, Why, and How Should You Use Embedded FPGA Technology for Hardware Acceleration? June 7, 2018 by Alok Sanghavi

    If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn’t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors — then progressing to gates, ALUs, microprocessors, and memories. FPGAs are simply one more useful component in the tool box, available for decades as standalone products, and now available for integration into your IC design using Achronix’s Speedcore eFPGA, supported by Achronix’s ACE design tools. These products allow you to easily incorporate the performance and flexibility of programmable logic into your next ASIC or FPGA design. The questions then …

    My Path to Achronix Applications Engineering April 26, 2018 by Katie Purcell

    Growing up in Virginia, I never thought I would become an engineer. Not that I didn’t want to be an engineer — the thought just never crossed my mind. As a kid, I spent most of my free time pursuing various arts. I loved music, learning to play the flute, piccolo, and later the electric bass, on top of spending many years studying classical ballet. And it may not be considered art, but I also loved baking; the process of perfecting old recipes and the creativity of coming up with new ones. A Common Thread The common thread with all of these creative endeavors is …

    Speedcore eFPGAs as a Risk Mitigator April 18, 2018 by Alok Sanghavi

    System architects and program managers worry about how to mitigate risk when developing an SoC. Risk can present itself in many forms, but it is most commonly the result of ill-defined and changing standards as well as the need to future-proof designs. The Programmable Logic Approach Relegating at-risk portions of the design to programmable logic is the traditional approach taken by system architects. However, a standalone FPGA cannot always deliver the needed performance or meet system power and cost goals. Enter the embedded FPGA (eFPGA), the SoC designer’s secret weapon to meet design goals while mitigating risk. Compared to using a standalone FPGA, adding an …

    Moving Machine Learning off the Cloud Calls for eFPGAs April 10, 2018 by Alok Sanghavi

    Artificial intelligence is reshaping the world we live in and opening opportunities in commercial and industrial systems applications that range from autonomous driving and medical diagnostics to home appliances, industrial automation, adaptive websites and financial analytics. Next up is the communications infrastructure that links systems together, moving toward automated self-repair and optimization. For example, the U.S. Navy plans to expand its Consolidated Afloat Networks and Enterprise Services (CANES) ocean combat network with AI, connecting ships, submarines and on-shore naval stations. These new architectures will perform functions such as load balancing and allocating resources for wireless channels and network ports based on predictions learned from experience. …