Achronix Speedcore eFPGA Custom Blocks Supercharge Data Acceleration Systems

Press Releases Date
  • Speedcore custom blocks dramatically increase Speedcore eFPGA performance and reduce die area and power consumption
  • Fully supported in Achronix ACE design tools

Santa Clara, Calif., October 17th, 2017 – Achronix today announced the availability of Speedcore custom blocks for its eFPGA IP solutions. Achronix Speedcore eFPGAs accelerate data intensive AI / machine learning, 5G wireless, automotive ADAS, datacenter and networking applications. Speedcore custom blocks massively improve performance, power, and area; and enable functionality that has never before been possible in standalone FPGAs. With Speedcore custom blocks, customers gain ASIC efficiency while retaining FPGA flexibility, resulting in a highly efficient implementation that minimizes power and area while maximizing data throughput.

Traditional CPU-based architectures are not scaling to meeting the exponential growth in compute demand required by the new wave of intelligent data intensive applications. This demand is driving the need for new, heterogeneous compute architectures with programmable hardware accelerators. Speedcore eFPGAs deliver the highest performance and lowest cost hardware acceleration. Now with Speedcore custom blocks, functions that traditionally ran slowly and consume significant resources in standalone FPGA fabrics are optimized for maximum performance and minimal die area as illustrated in the following examples.

  • The area of a CNN-based YOLO object recognition algorithm was reduced by over 40% by optimizing the DSP and memory blocks for matrix multiplication.
  • Large string search functions that require parallel comparator arrays resulted in area reduction of over 90% when implemented in Speedcore custom blocks.
  • Barrel shifters and bit manipulation structures can be fully implemented in Speedcore custom blocks allowing larger, sophisticated applications in the same area, increasing the achievable frequency.
  • The core functionality of a 400 Gbps packet processing data path running at 800 MHz is implemented in Speedcore custom blocks with the programmable logic managing the analysis and control functionality. Today’s standalone FPGAs cannot support this high throughput for packet processing applications.

“Industry leaders are excited about Speedcore custom blocks and the potential they offer,” said Steve Mensor, Vice President of Marketing, Achronix Semiconductor. “The companies that we are working with are building the next generation of heterogeneous compute platforms and high-bandwidth communication systems. They are building high-performance hardware accelerators that can be changed over time as their compute algorithms evolve. Achronix eFPGA IP, now with Speedcore custom blocks, allows them to have programmability with ASIC-level performance and die size efficiency.”

Speedcore Custom Blocks Definition

Speedcore custom blocks are defined collaboratively by Achronix with its customers through a detailed architecture analysis of acceleration workloads. Repeated functions that are performance and/or area bottlenecks are evaluated as candidates to be hardened into Speedcore custom blocks. A new release of ACE design tools that includes the new Speedcore eFPGA with custom blocks is then provided to customers for benchmarking and evaluation. If required, the process is iterated to create the optimal solution for the customer’s system.

Support in ACE Design Tools

Achronix ACE design tools fully support Speedcore custom blocks from design capture to bitstream generation and system debug in the same way as memories and DSP blocks. Achronix creates a unique GUI for each Speedcore custom block that manages all configuration rules. ACE contains full timing details for all configurations of the Speedcore custom blocks, which allows ACE to complete timing-based place-and-route for designs. Customers can use the powerful floorplanner tool for design optimization and to make regional or site assignments for all block instances. ACE also includes a critical path analysis tool that allows customers to analyze timing. Customers can also use ACE’s powerful Snapshot embedded logic analyzer to create complex triggers and show run-time signals within a Speedcore instance.

About Speedcore Embedded FPGA (eFPGA)

Speedcore embedded FPGA (eFPGA) IP can be integrated into an ASIC or SoC. Customers specify their logic, RAM and DSP resource needs, then Achronix configures the Speedcore IP to meet their individual requirements. Speedcore look-up-tables (LUTs), RAM blocks, DSP64 blocks and custom blocks can be assembled in flexible columns to create the optimal programmable function for any given application.

Forward-Looking Statements

This press release contains certain forward-looking statements within the meaning of the federal securities laws. These forward-looking statements generally are identified by the words “intend,” “future,” “may,” “will,” “would,” “will be,” and similar expressions. Forward-looking statements are predictions, projections and other statements about future events that are based on current expectations and assumptions and, as a result, are subject to risks and uncertainties. All statements, other than statements of present or historical fact included in this press release, including Achronix’s strategy, products, operations, prospects and pipeline expectations, and plans and objectives of management are forward-looking statements. Many factors could cause actual future events to differ materially from the forward-looking statements in this press release, including but not limited to: changes in domestic and foreign business, market, financial, political, and legal conditions and changes in the combined capital structure; the ability to implement business plans, forecasts, and other expectations and identify and realize additional opportunities; risks related to the rollout of Achronix’s business and the timing of expected business milestones; the effects of competition on Achronix’s business; the effects of the cyclical nature of the semiconductor industry on Achronix’s business; risks related to Achronix’s customer concentration; the risks to Achronix’s business if internal processes and information technology systems are not properly maintained; risks associated with Achronix’s operational dependence on independent contractors and third parties; risks associated with Achronix’s reliance on certain suppliers for, among other things, silicon wafers, and shortages or interruptions in supply of wafers and other supplies; risks and uncertainties related to Achronix’s international operations, including possible restrictions on cross-border investments which could harm Achronix’s financial position; and risks associated with Achronix’s ability to develop new products and adapt to new markets. The foregoing list of factors is not exhaustive. You should carefully consider the foregoing factors and the other risks and uncertainties described in the “Risk Factors” section of ACE’s registration statement on Form S-4, filed with the SEC on February 10, 2021, as may be amended from time to time, and other documents filed or that may be filed by ACE from time to time with the SEC and available on EDGAR at www.sec.gov. These filings identify and address other important risks and uncertainties that could cause actual events and results to differ materially from those contained in the forward-looking statements. There may be additional risks that Achronix does not presently know, or that Achronix currently believes are immaterial, that could also cause actual results to differ from those contained in the forward-looking statements. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements as predictions of future events, and Achronix assumes no obligation and does not intend to update or revise these forward-looking statements, whether as a result of new information, future events, or otherwise, except as may be required by applicable law.

About Achronix Semiconductor Corporation

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-end FPGA-based data acceleration solutions, designed to address high-performance, compute-intensive and real-time processing applications. Achronix FPGA and eFPGA IP offerings are further enhanced by ready-to-use accelerator cards targeting AI, machine learning, networking and data center applications. All Achronix products are fully supported by a complete and optimized range of Achronix software tools called ACE, which enables customers to quickly develop their own custom applications.

Achronix has a global footprint, with sales and design teams across the U.S., Europe and Asia. In January 2021, Achronix entered into a definitive merger agreement with ACE Convergence Acquisition Corp. (Nasdaq: ACEV) in a transaction that would result in Achronix being listed on Nasdaq. The transaction is expected to close in the first half of 2021.

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Contacts

Bob Siller
Achronix Semiconductor Corporation
408-889-4142
bobsiller@achronix.com


Achronix and Speedster are registered trademarks, and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other brands, product names and marks are the property of their respective owners.