SANTA CLARA, CA, Oct. 3, 2019 – Technologists to give talks on memory mapped FPGA, 5G network topologies and on-chip AXI network hierarchies
Achronix Semiconductor Corporation, a fabless semiconductor company who offers high-performance FPGA, eFPGA and chiplet solutions targeting AI, ML networking and data-center applications.
Senior technologists from Achronix will present on how to incorporate high-performance FPGAs and eFPGA IP into SoCs and ASICs for applications such as 5G wireless, HPC and machine learning. In addition, the company invites attendees to visit their booth, #343, for a product demonstration or informal meeting.
NoC NoC – Who’s There? A memory mapped FPGA for connectivity to Arm CPUs)
Wednesday, October 09, 1:30PM - 2:00PM | Expo Hall Theater
Steve Mensor, Vice President, Marketing
Heterogeneous Compute Architecture for Distributed 5G Network Topologies
Wednesday, October 09, 11:30 AM - 12:20 PM | Executive Ballroom 210H
Mike Fitton, Senior Director, Strategy and Planning
Dedicated On-Chip AXI Network Hierarchies for Algorithm Acceleration
Thursday, October 10, 2:30 PM - 3:20 PM | Executive Ballroom 210G
Kent Orthner, Senior Director, Systems
Booth 343/Product Demonstrations
Stop by the booth #343 to see Achronix’s new 7nm Speedster7t FPGAs and learn about Speedcore eFPGA IP. The Speedster7t is a standalone FPGA which offers a 20 Tbps 2D NoC, 4 Tbps GDDR6 bandwidth and up to 72 channels of 112 Gbps SerDes. For designers who are developing their own custom ASIC with ARM processor, the Speedcore eFPGA fits seamlessly alongside the CPU to allow for custom acceleration of algorithms and design flexibility for applications such as AI, machine learning, 5G wireless, networking and automotive.
The conference runs Wednesday, October 9 to Thursday, Oct 10 at the San Jose McEnery Convention Center, San Jose, Calif.
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