Achronix Announces Immediate Availability of Speedcore eFPGA IP for SoC Acceleration

Press Releases Date
  • Speedcore embedded FPGAs improve throughput and latency performance by 10X, reduce power by 50 percent and reduce cost by 90 percent
  • Speedcore shipping to customers today

Santa Clara, Calif., October 11, 2016 – Achronix today announced the immediate availability of its Speedcore™ embedded FPGA (eFPGA) IP for integration into customers’ SoCs. Speedcore is designed for compute and network acceleration applications and is based on the same high-performance architecture that is in Achronix’s Speedster 22i FPGAs that have been shipping in production since 2013. Speedcore eFPGA products are fully supported by Achronix’s robust and proven ACE design tools.

With Speedcore, customers specify the optimal die size, power consumption and resource configuration required for their end application. Customers define the quantity of look-up-tables (LUTs), embedded memory blocks and DSP blocks. Additionally customers define the Speedcore aspect ratio, IO port connections and can make tradeoffs between power and performance. Achronix delivers a GDS II of the Speedcore IP that customers integrate directly into their SoC, and a custom, full-featured version of the ACE design tools that customers use to design, verify and program the functionality of the Speedcore eFPGA.

“Over the years, different companies have talked about eFPGA products, but Achronix Speedcore is the first eFPGA IP to ship to end customers, and it is a game changer” said Robert Blake, President and CEO, Achronix Semiconductor. “Achronix was the first company to deliver high density FPGAs with embedded system level IP. We are using that same proven methodology to deliver our eFPGA technology to customers who want to combine all the efficiencies of ASIC design with the flexibility of eFPGA programmable hardware accelerators on the same chip.”

“Designers have long sought the inherent advantages that could come from embedding FPGA functionality as IP into SoCs for a host of different high performance applications,” said Richard Wawrzyniak, Principal Analyst for ASIC & SoC at Semico Research Corp. “Achronix has now delivered eFPGA IP to customers who are developing high-performance computing products where offloading compute intensive functions from processors to FPGA IP can provide a tremendous performance boost. While an exciting opportunity for Achronix, seeing FPGA IP become a reality is great news for the semiconductor industry, particularly when you consider the large market opportunity for compute high-performance applications.

Speedcore is the Optimal Hardware Accelerator

Compute and communications infrastructure in data centers and enterprises can no longer keep pace with exponential data growth rates, changing security and software virtualization requirements. Traditional multi-core CPUs and SoCs need programmable hardware accelerators that pre-process and offload data to increase their compute performance. FPGAs are the optimal hardware accelerator solution because accelerators need to be updated with new functionality as algorithms are constantly changing. Standalone FPGAs are a convenient and practical solution for low to medium volume applications, whereas Speedcore is the optimal solution for high volume applications and offers significant advantages:

  • Lower power:
    • Speedcore has direct wire connections to the SoC, which eliminates the large programmable IO buffers found in standalone FPGAs. Programmable IO circuitry accounts for half of the total power consumption of standalone FPGAs.
    • Speedcore is sized exactly to the requirements of the customer’s end application
    • Customers can tune the process technology to tradeoff performance for lower power
  • Higher interface performance:
    • Speedcore offers dramatically higher interface performance than standalone FPGAs in the form of lower latency. Speedcore is connected to the ASIC through an ultra wide parallel interface whereas standalone FPGAs typically connect through a high latency SerDes structure.
  • Lower system cost:
    • Speedcore die size is much smaller than standalone FPGAs because the programmable IO buffer structure is eliminated.
    • FPGAs have high pin counts which dictate the PCB layer count to support the FPGA BGA package escape routing. Additionally, Speedcore eliminates the need for all of the support components around the standalone FPGA including power regulators, clock generators, level shifters, passive components and FPGA cooling.
  • Higher system reliability and yields:
    • Integrating FPGA functionality into an ASIC improves system level signal integrity and eliminates reliability and yield loss associated with having a standalone FPGA on the PCB.

Process Technology

Speedcore is architected in modular fashion to support flexibility for customers to define their resource requirements and for Achronix to rapidly configure the Speedcore IP for delivery. Additionally, the modular architecture allows Achronix to easily port the technology to different process technologies and metal stacks. Speedcore is now available on TSMC 16FF+ and is in development on TSMC 7nm.

Easy to Evaluate Speedcore

Achronix’s ACE design tools include an example instance of Speedcore where customers can compile their designs today to evaluate Speedcore quality-of-results for performance, resource usage and compile times. Additionally Achronix has complete documentation on Speedcore functionality and ASIC integration methodologies. Customers interested in receiving die size and power information can contact Achronix for details on their specific Speedcore size and process.

Product Availability

Speedcore is now broadly available. Prior to this announcement, all information and customer discussions related to Speedcore were confidential. During the period of confidentiality, Achronix closed multiple Speedcore design. With this announcement, interested companies can get comprehensive information for these products at

About Achronix Semiconductor Corporation

Achronix is a privately held, fabless semiconductor corporation based in Santa Clara, California. The Company developed its FPGA technology which is the basis of the Speedster22i FPGAs and Speedcore eFPGA technology. All Achronix FPGA products are supported by its ACE design tools that include integrated support for Synopsys (NASDAQ:SNPS) Synplify Pro. The company has sales offices and representatives in the United States, Europe, and China, and has a research and design office in Bangalore, India.


Steve Mensor
Achronix Semiconductor Corporation
Susan Cain
Cain Communications

Achronix and Speedster are registered trademarks and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other brands, product names and marks are the property of their respective owners.

Forward-Looking Statements

This press release contains certain forward-looking statements within the meaning of the federal securities laws. These forward-looking statements generally are identified by the words “intend,” “future,” “may,” “will,” “would,” “will be,” and similar expressions. Forward-looking statements are predictions, projections and other statements about future events that are based on current expectations and assumptions and, as a result, are subject to risks and uncertainties. All statements, other than statements of present or historical fact included in this press release, including Achronix’s strategy, products, operations, prospects and pipeline expectations, and plans and objectives of management are forward-looking statements. Many factors could cause actual future events to differ materially from the forward-looking statements in this press release, including but not limited to: changes in domestic and foreign business, market, financial, political, and legal conditions and changes in the combined capital structure; the ability to implement business plans, forecasts, and other expectations and identify and realize additional opportunities; risks related to the rollout of Achronix’s business and the timing of expected business milestones; the effects of competition on Achronix’s business; the effects of the cyclical nature of the semiconductor industry on Achronix’s business; risks related to Achronix’s customer concentration; the risks to Achronix’s business if internal processes and information technology systems are not properly maintained; risks associated with Achronix’s operational dependence on independent contractors and third parties; risks associated with Achronix’s reliance on certain suppliers for, among other things, silicon wafers, and shortages or interruptions in supply of wafers and other supplies; risks and uncertainties related to Achronix’s international operations, including possible restrictions on cross-border investments which could harm Achronix’s financial position; and risks associated with Achronix’s ability to develop new products and adapt to new markets. The foregoing list of factors is not exhaustive. You should carefully consider the foregoing factors and the other risks and uncertainties described in the “Risk Factors” section of ACE’s registration statement on Form S-4, filed with the SEC on February 10, 2021, as may be amended from time to time, and other documents filed or that may be filed by ACE from time to time with the SEC and available on EDGAR at These filings identify and address other important risks and uncertainties that could cause actual events and results to differ materially from those contained in the forward-looking statements. There may be additional risks that Achronix does not presently know, or that Achronix currently believes are immaterial, that could also cause actual results to differ from those contained in the forward-looking statements. Forward-looking statements speak only as of the date they are made. Readers are cautioned not to put undue reliance on forward-looking statements as predictions of future events, and Achronix assumes no obligation and does not intend to update or revise these forward-looking statements, whether as a result of new information, future events, or otherwise, except as may be required by applicable law.

About Achronix Semiconductor Corporation

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-end FPGA-based data acceleration solutions, designed to address high-performance, compute-intensive and real-time processing applications. Achronix FPGA and eFPGA IP offerings are further enhanced by ready-to-use accelerator cards targeting AI, machine learning, networking and data center applications. All Achronix products are fully supported by a complete and optimized range of Achronix software tools called ACE, which enables customers to quickly develop their own custom applications.

Achronix has a global footprint, with sales and design teams across the U.S., Europe and Asia. In January 2021, Achronix entered into a definitive merger agreement with ACE Convergence Acquisition Corp. (Nasdaq: ACEV) in a transaction that would result in Achronix being listed on Nasdaq. The transaction is expected to close in the first half of 2021.

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Bob Siller
Achronix Semiconductor Corporation

Achronix and Speedster are registered trademarks, and Speedcore and Speedchip are trademarks of Achronix Semiconductor Corporation. All other brands, product names and marks are the property of their respective owners.