Achronix is both exhibiting at and is a Business Sponsor of the FPGA congress, organized by ELEKTRONIKPRAXIS and the FPGA training center PLC2. The convention showcases the progress made in FPGA technology across all major manufacturers. It focuses on user-oriented, practical applicable solutions that developers can quickly integrate into their own everyday work.
Raymond Nijssen, Vice President and Chief Technologist for Achronix, will be presenting “MLP: A New FPGA Architecture Block for High-Performance Machine Learning” on May 23rd at 11:45am to 12:30pm.
This presentation focuses on the machine-learning processor (MLP) block, one of the main innovations in the Achronix new Gen4 FPGA architecture. The MLP purpose is to be the most suitable building block to efficiently implement large-scale matrix-vector multiplications which are at the basis of the vast majority of AI/ML algorithms.
The conference will be held May 21st – 23rd 2019, at the:
For details on the conference, visit www.fpga-kongress.de/
More details to follow.