Visitors to CES 2018 will Experience the Future of Transportation

Authored By:
Alok Sanghavi
Sr. Marketing Manager

Posted On: Jan 05, 2018

When visitors to CES 2018 want to travel to the Las Vegas Convention Center across town, it will likely be in a fully autonomous vehicle from Lyft getting them there. While this futurist trip will certainly be a first for many riders, this type of point-to-point travel will soon become commonplace. But questions concerning the safety of autonomous vehicles remain. For Lyft's CES demonstration, a backup pilot will be in the driver's seat for added safety.

Transitioning from pilot-assisted to fully autonomous vehicles heightens the role of vehicle safety. The more the on-board network takes control of the vehicle, the more drivers and passengers like those at CES in Lyft cars expect multiple levels of safety to prevent accidents. This drive for fault-tolerant safety has driven the promulgation of ISO 26262 for autonomous vehicles as a derivative of the IEC 61508 generic functional safety standard for electrical and electronic systems.

A system implemented in an autonomous vehicle should maximize the diagnostic coverage of IP elements and offer high functional safety by handling safe, detected and undetected faults appropriately. Programmable architectures, particularly embedded FPGAs, enhance the safety of the vehicle as a system because of their programmable nature.

Functional safety is one benefit of eFPGAs. Other advantages include lower latency, better security, high bandwidth and reliability. In fully autonomous and advanced piloted vehicles of the future, there will be dozens and even hundreds of distributed CPUs. Peripheral processing functionality to tie together automotive subnetworks can be well served by an eFPGA IP.

Count on an eFPGA in an SoC to host in-flight functions. Better yet, it can host extensive hardware diagnostic routines orders of magnitude faster than software-based diagnostics, increasing fault coverage. EFPGA IP offers advantages such as minimizing CPU interrupts by writing to a CPU cache rather than off-chip memory. BIST circuits required in CAN designs, often amounting to 10 to 15% of total ASIC circuitry, can in many cases be eliminated, since circuitry supporting BIST can be programmed within the eFPGA. Additionally, an eFPGA can offer on-chip probing functions for diagnostics.

Possibly an eFPGA’s most attractive feature is its programmatically to aid in the safety life cycle ––automotive OEMs can update already deployed systems.

Whether an automobile is a piloted vehicle or an autonomous vehicle piloting through Las Vegas traffic with only minimal human assistance, the need for hardware acceleration in networked transportation system is skyrocketing. The best choice is an eFPGA IP implemented inside an SoC as a hard IP. It optimizes real estate and power efficiency, and includes configurable capabilities.

Those lucky CES attendees will cruise down Las Vegas Blvd in self-driving BMW 5 Series. It won’t be long before every car dealer can take prospective buyers on a similar ride, most likely, with an on-board eFPGA.

The future of transportation is here.

To read more about eFPGA technology for automotive applications, download the white paper, Speedcore eFPGA in Automotive Intelligence Applications (WP010).