Training Videos

A collection of training videos covering a range of technical topics.
Video Title Published Date
Best Practices in FPGA Design with Integrated Network on Chip

This video tutorial shows how to create a design that connects and interfaces with the Achronix Speedster7t FPGA network on chip or NoC. You will learn how the placement of NoC access points impacts latency and traffic congestion.

Introduction to Achronix FPGA Design Tool Flow

Introduction to SynplifyPro and ACE, using the Achronix quick-start design as a demo.

Introduction to the Achronix I/O Designer Toolkit

Overview of the Achronix I/O Designer Toolkit. Shows demo of how to configure clocks and other GPIO, PLLs, GDDR6 interfaces, Ethernet, DDR4, PCIe, and the NoC. Highlights features such as changing locations of I/O via drag-and-drop, cloning/copying interfaces for easy reuse in the same or new designs, plus viewing floorplan layout, ball layout and pin locations, and resource utilization.

Introduction to the Machine Learning Processor

Introduction to the basic architecture of the machine learning processor (MLP) and explains the overall device capabilities. This video covers input data selection, supported number formats, multiplier arrangement, output addition, accumulation and formatting.  In addition, this video presents the integer and floating-point libraries of pre-configured components based on the MLP that can be used in many design scenarios.

Introduction to the Speedster7t FPGA Network-on-Chip

Overview of the Achronix network-on-chip (NoC). Describes features, performance, and example transactions.