Speedchip FPGA Chiplets

Speedchip™ FPGA chiplets are optimized for embedding in advanced system-in-package (SiP) solutions such as 2.5D via silicon interposer or organic substrate.

Among the spectrum of programmable solutions that include CPUs and GPUs, FPGAs offer the highest compute capacity with the lowest power profile. However, discrete FPGAs functioning as hardware accelerators alongside processors and other compute solutions can be costly and require significant board space for the FPGA plus supporting components. Integrating an FPGA chiplet and ASIC die in the same package is an ideal solution for companies looking to bring the programmability and flexibility of an FPGA to their next-generation, high-performance system-in-package (SiP) solutions. Bringing FPGA functionality closer to other system chips in the same package enables higher bandwidth, reduced system latency, and reduced system cost.


Example Chiplet Example


Speedchip FPGA Chiplets

Speedchip FPGA chiplets are optimized for embedding in advanced system-in-package (SiP) solutions such as 2.5D via silicon interposer or organic substrate. With Speedchip FPGA chiplets, customers define the functionality for their FPGA chiplet by specifying the number of LUTs, memory blocks, DSP blocks and I/O interfaces needed for their application. Achronix then develops the Speedchip FPGA chiplet tailored to the customer’s specification, delivering the first samples within 6 to 8 months for integration in a SiP solution.

Designers have several integration options, such as partition the SiP sub-system using either die-to-interposer stacking or die-to-wafer stacking, where finished die are bonded on top of a fully processed wafer. Customers will need to work with their preferred packaging system vendor to integrate the Speedchip FPGA chiplet into their SiP.


Speedchip Example


Benefits of FPGA Chiplets

Versus Standalone FPGAs

Integrating a Speedchip FPGA chiplet in a SiP has the following advantages over standalone FPGAs:

  • Significantly lower cost and power as the FPGA chiplet is optimally sized for the end application and eliminates the need to have high-power programmable I/O.
  • Higher levels of integration with processor and memory cores due to a smaller footprint of the FPGA chiplet.
  • Improved electrical and reliability performance of the system.

Versus Monolithic Solutions

There are two key benefits of using FPGA chiplets versus a monolithic SoC:

  • In contrast to SoCs, where all IP must be on the same process, Speedchip FPGA chiplets can be built on a different process technology than other chiplets that are integrated in the SiP package. For example, the Speedchip FPGA chiplet could be built on the most advanced process technology available to maximize logic density and deliver the highest performance whereas the other chiplets could be built on older process technologies that offer lower cost profiles.
  • Customers can mix and match Speedchip FPGA chiplets with other die components to create multiple package and SKU options.
  • Smaller chips resulting in higher yields and in-turn being less prone to silicon defects, resulting in lower silicon manufacturing costs.

Speedchip FPGA Chiplets Supports a Range of Applications

High-performance computing, networking and storage applications require enormous interconnect bandwidth between co-packaged dice. Speedchip FPGA chiplets can be used for application-specific workload acceleration in networking and communications infrastructure applications such as encryption, decryption and compression, packet processing, traffic management and 5G physical layer signal processing. In addition, customers can use Speedchip chiplets for high-performance compute acceleration workloads such as data centers, high-frequency trading and autonomous driving.

When To Consider Speedchip FPGA Chiplets

Achronix FPGA product offerings include:

  •  Speedcore eFPGA IP for SoC integration
  •  Speedchip FPGA chiplets for embedding in 2D/2.5D SiP solutions

Speedcore eFPGAs are ideal for small-to-medium density applications demanding the highest bandwidth, lowest latency, lowest power and lowest cost. For larger density applications, Speedchip FPGA chiplets are optimal when multiple die at different process technology nodes can be integrated on the same package. Contact Achronix Sales for help in determining the best solution for your application.

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