Jon is the Chief Technology Officer at Accolade Technology. Accolade has deep expertise in cybersecurity ethernet packet processing in Xilinx and Achronix FPGAs, with special emphasis on DRAM table-based processing blocks such as flow table, Access Control List (ACL) filtering, deduplication and string search. Accolade has mature shipping n x 100G Smart NIC products and a licensable Verilog codebase and SDK. Jon has over 30 years of ASIC and FPGA design experience, an MSEE from the University of California at Santa Barbara and a BS (BTech) from IIT Madras.
CTO, Accolade Technology