Programmable logic IP cores, intended for integration within a broader-function ASIC, are a long-discussed and –explored product option that has yet to achieve more than niche adoption. Small FPGA IP players such as Flex Logic Technologies and Menta linger in the market, but picking such a supplier for your next SoC can be a gamble; what happens if they get acquired or otherwise disappear? And big FPGA vendors like Altera (now Intel's Programmable Solutions Group) and Xilinx, along with medium-sized suppliers such as Actel (now part of Microsemi) and Lattice Semiconductor, are focused on selling standalone programmable logic ICs, with little to-date motivation to detract from those lucrative product offerings via IP licensing deals.
Achronix Semiconductor aspires to succeed where its programmable logic IP core competitors have struggled via the company's new Speedcore eFPGA technology, a complement to the company's Speedster22i FPGA chip line. Achronix gained significant visibility in 2010 when it announced a partnership with Intel to become the latter company's first 22 nm foundry customer (on which, as the name implies, Speedster22i is fabricated). However, according to Steve Mensor, the company's Vice President of Marketing, Achronix's lineage dates all the way back to 2004, when the company was founded, leveraging Cornell University research. Achronix' initial focus on asynchronous logic was thwarted by the dominant presence of loop-back functions in programmable logic-based circuit designs, which negate asynchronous logic's inherent performance advantage in feed-forward function arrangements. The company's initial PicoPipe products were also developed without emphasis on low power operation, which rendered them largely non-commercializable.
At that point, the company refocused its attention on more conventional FPGA architectures. Speedster22i devices began shipping in early 2013, followed by an FPGA-based accelerator board for data center applications earlier this year. And as Mensor explained in a recent briefing, the seeds for the new Speedcore IP line were sown earlier this decade, when Speedster22i devices were still in design (Figure 1). While the chips' programmable logic arrays were internally designed in Santa Clara, CA, the devices' I/O buffers and other peripheral circuits were sourced elsewhere and combined with the FPGA arrays by a contract design team in Bangalore, India. In effect, this integration group provided a proof-of-concept test for the sorts of licensing arrangements with SoC developers that Achronix is now pursuing with Speedcore.