We’ve talked a lot in these pages about the battle for the future of the data center. FPGAs, we say, represent the path to enlightenment, the power panacea, the key to breaking the energy-hungry tyranny of the von Neumann architecture. Apparently, we are not alone in this line of thinking. Intel, for example, plunked down about sixteen billion votes in favor of an FPGA-based future by acquiring Altera. Xilinx joined a cadre of companies looking to crack Intel’s longstanding dominance of the data center by devising standards to facilitate open-architecture attacks on Intel’s proprietary fortress. Someday, the thinking goes, FPGAs will pave the path to Moore-esque improvement in the energy efficiency of computing, despite the demise of Moore’s Law itself.
Achronix, the longest-standing new FPGA company to challenge the dominance of Altera and Xilinx in recent years, is undoubtedly aware of this vast new marketing meadow where programmable logic companies will someday graze on a steady supply of rich, green sockets. It would be impossible to be in the FPGA business and not notice. But Achronix had a different thought: Why wait for the future? Why not find a way to apply FPGA fabric to improve the performance and efficiency of the data center right now, with the server hardware already in the field today.
Rather than sitting around waiting for some fancy 10nm, FinFET-driven, multi-patterned, EUV exposed, HLS-driven, HMB-having revolution to slowly sweep through the cubic miles of already-working server farms, transforming the landscape from primordial programmable ooze, Achronix came up with a clever strategy to boost today’s servers using today’s FPGAs.
At the top level, the strategy is simple: produce a PCIe board that plugs into current servers and provides FPGA-powered acceleration to the critical packet-passing and networking functions. By improving the performance and power efficiency of those operations, the entire data center can run faster and more efficiently – without ever swapping out a rack or blade.
To fully understand the cleverness of this strategy, it helps to know the story of Achronix. Achronix was originally founded with a plan to exploit a clever new asynchronous architecture for FPGA fabric. The company’s picoPIPE filled the fabric with tiny registers that pipelined the entire design at a very fine granularity, allowing extremely (at the time) high Fmax of over 1GHz. Over time, however, Achronix’s strategy evolved. They put the picoPIPE on the back burner and focused instead on developing purpose-built devices to tackle the most common and highest-value networking applications.
For those who followed the breathless battle between Xilinx/TSMC and Altera/Intel to see who could be the “first” to market with a FinFET FPGA, it might be a bit of a surprise that the actual “first” company to ship a FinFET FPGA was Achronix, with their 22nm, Intel-fabbed, Speedster family. The combination of FinFET technology and very strategic hardening of IO interfaces make Speedster a very competitive device for high-speed networking. Perfect, in fact, if one wanted to accelerate the networking functions in data center applications.