The Hardware Engineering group is hiring a Staff Engineer, who will be responsible for the physical design of IP and I/O subsystems, NoC blocks as well as IP blocks in the fabric. The Hardware Engineering group is responsible for all fabric and SoC hardware design at Achronix. This group develops and integrates high-speed serial and parallel interface Phys and controllers, network-on-chip (NoC), clocking and reset, etc.
The employee will own the design from synthesis to GDSII, and be responsible for all sign-off checks, including STA, physical verification and reliability verification. The employee may also contribute to methodology development. The employee should be self-driven, constantly looking to set the bar higher, and a driver of excellence. The employee should have a strong background in Tcl and Python/Perl coding.
Job Description/Responsibilities
Synthesis, floorplanning plus place and route for various IP, I/O or NoC blocks/subsystems, typically consisting of 2-3M standard cell instances, 50-500 macros, with frequencies in up to 1-2 GHz range:
- Meet all sign-off requirements on the given block — STA, PV (DRC, LVS, antenna, etc.), RV (EM, IR) and FEV
- Potentially own integration blocks, that require structured routing
- Support full-chip and/or subsystem with regular deliveries of blocks
- Contribute to methodologies and best practices across all ASIC physical design
- Participate in meetings with local and global teams spanning Hardware, Systems, Software and Product Engineering
Skills
- Good experience with synthesis and physical design, having handled large, complex blocks, with multiple hard macros, end-to-end (RTL2GDSII).
- Expertise with Tcl scripting and Python/Perl automation.
- Experience with integration of I/O buffers, PLLs, SRAMs, etc.
- Good understanding of either memory interfaces such as DDR4/5, serial interfaces such as PCIe/Ethernet/PIPE or network-on-chip (NoC) architectures is a plus.
- Excellent written and verbal communication skills.
- Intrinsically driven, and always raising the bar.
- Ability to take high-level requirements, and create solutions around those. Must be able to see the big picture.
- Thrives in a dynamic and fast-paced environment, with a proactive mindset.
- Works well with other team members and has a collaborative approach.
- Experience with Synopsys tools such as Fusion Compiler, ICC2, Primetime, ICV required.
- Experience with post-Si characterization is a plus.
Education and Experience
- BS or MS and 6+ years of experience
- Previous experience in at least two product developments, potentially including post-Si bring-up