Videos

Video Title Published Date

eFPGA vs. FPGA Design Methodologies

Namit Varma, senior director of Achronix’s India Technology Center, discusses the differences between discrete and embedded FPGAs.

eFPGA Verification: How Embedded FPGAs Compare to a Discrete FPGAs and ASICs.

Chris Pelosi, vice president of hardware engineering at Achronix, talks with Semiconductor Engineering about how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs.

eFPGA Test

Achronix's Volkan Oktem talks with Semiconductor Engineering about design for test using embedded FPGAs, including how to plan for coverage and how much it will cost.

EDACafé DAC 2017 Interview with Steve Mensor

Interview with Steve Mensor, VP of Marketing at Achronix at DAC 2017 with EDACafé.

BittWare S7t-VG6 VectorPath PCIe Accelerator Card

Learn about the S7t-VG6 VectorPath® PCIe accelerator card from BittWare featuring the Achronix Speedster7t FPGA.

Achronix's Competitive Advantage: 2D NoC, Reprogrammability, and Enhanced Functionality

In this video, Steve Mensor, Vice President of Marketing, and Scott Schweitzer, Director of Product Planning, take you on a journey through the revolutionary world of Achronix's high-end FPGA solutions.

Achronix Speedster7t FPGA Overview

Overview of features and capabilities of Speedster7t FPGA from Achronix. 2D NoC, machine learning processors, high-performance I/O and GDDR6 memory interfaces.

Achronix Speedster7t FPGA 400G Lab Demo

Live demonstration of Speedster®7t 1500 running 400G Ethernet traffic on the VectorPath® accelerator card.

Achronix Speedcore Gen4 eFPGA IP for AI/ML and Networking Hardware Acceleration

Steve Mensor, VP of Marketing at Achronix previews the coming announcement of the next-generation Speedcore architecture.

Achronix Speedcore eFPGA IP Overview

Overview of Achronix Speedcore eFPGA IP which is an FPGA IP core that can be embedded into a custom ASIC or SoC device.

Achronix Demonstrates Silicon Validation Device with 112 Gbps SerDes

Achronix has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next- generation FPGAs devices. Fabricated on TSMC’s 7nm FinFET process technology, these 112 Gbps SerDes blocks provide true multi-standard support for a wide range of digital serial communications standards with data rates ranging from 1 Gbps to 112 Gbps.