Videos

Video Title Published Date

Achronix Demonstrates Silicon Validation Device with 112 Gbps SerDes

Achronix has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next- generation FPGAs devices. Fabricated on TSMC’s 7nm FinFET process technology, these 112 Gbps SerDes blocks provide true multi-standard support for a wide range of digital serial communications standards with data rates ranging from 1 Gbps to 112 Gbps.

Achronix Speedcore Gen4 eFPGA IP for AI/ML and Networking Hardware Acceleration

Steve Mensor, VP of Marketing at Achronix previews the coming announcement of the next-generation Speedcore architecture.

EDACafé DAC 2017 Interview with Steve Mensor

Interview with Steve Mensor, VP of Marketing at Achronix at DAC 2017 with EDACafé.

eFPGA Test

Achronix's Volkan Oktem talks with Semiconductor Engineering about design for test using embedded FPGAs, including how to plan for coverage and how much it will cost.

eFPGA Verification: How Embedded FPGAs Compare to a Discrete FPGAs and ASICs.

Chris Pelosi, vice president of hardware engineering at Achronix, talks with Semiconductor Engineering about how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs.

eFPGA vs. FPGA Design Methodologies

Namit Varma, senior director of Achronix’s India Technology Center, discusses the differences between discrete and embedded FPGAs.

Embedded Computing Design Interview with Steve Mensor at Arm TechCon 2018

Brandon Lewis, Editor-in-Chief of Embedded Computing Design sits down with Achronix VP of Marketing, Steve Mensor, to discuss how to deal the growing volume of data that will require to be processed to drive the next wave of AI applications.

Embedded FPGA: Enabling 5G Infrastructure

Mike Fitton, Senior Director, Strategic Planning, Achronix discusses the role of eFPGAs in 5G infrastructure at the IP SoC Days 2018, Santa Clara, USA.on April 5th, 2018

From 40-500 MHz eFPGA to FPGA Chiplet Solution

Design and Reuse interview with Steve Mensor, VP of Marketing, at DAC 2018, San Francisco, CA; June 24-28th.

How to Program an eFPGA

Kent Orthner, system architect at Achronix, talks with Semiconductor Engineering about how to program an embedded FPGA and what's different for ASIC engineers.