Videos

Video Title Published Date

The Basics of eFPGA Acceleration

EDACafé DAC 2017 Interview with Steve Mensor

Interview with Steve Mensor, VP of Marketing at Achronix at DAC 2017 with EDACafé.

eFPGA Test

Achronix's Volkan Oktem talks with Semiconductor Engineering about design for test using embedded FPGAs, including how to plan for coverage and how much it will cost.

eFPGA Verification: How Embedded FPGAs Compare to a Discrete FPGAs and ASICs.

Chris Pelosi, vice president of hardware engineering at Achronix, talks with Semiconductor Engineering about how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs.

How to Program an eFPGA

Kent Orthner, system architect at Achronix, talks with Semiconductor Engineering about how to program an embedded FPGA and what's different for ASIC engineers.

The Achronix Validation Platform Demonstration

Achronix Speedcore eFPGA IP opens new opportunities for companies looking to integrate embedded FPGA technology into their ASIC or SOC. Speedcore IP is a high-performance, customizable programmable fabric, allowing customers to define the amount of logic, memory, DSP plus their own custom blocks to fit their application requirements. This video demonstrates a validation platform for this game-changing technology.

Embedded FPGA: Enabling 5G Infrastructure

Former Achronix Sr. Director of Strategy and Planning discusses the role of eFPGAs in 5G infrastructure at the IP SoC Days 2018, Santa Clara, USA.on April 5th, 2018

From 40-500 MHz eFPGA to FPGA Chiplet Solution

Design and Reuse interview with Steve Mensor, VP of Marketing, at DAC 2018, San Francisco, CA; June 24-28th.

Increase Performance, Reduce Die Size with Speedcore eFPGA Custom Blocks Flow

Achronix Vice President of Marketing, Steve Mensor, speaking at DAC 2018 in San Francisco.

Learning to Share – Embedded FPGA Timing Closure

Achronix Systems Architect, Kent Orthner, speaking at DAC 2018 in San Francisco.

How to Time an eFPGA, and What Can Go Wrong

Namit Varma, senior director of Achronix’s India Technology Center, explains how to time an eFPGA, what can go wrong, what are the different clocking scenarios, and what impact variation has on the process.

eFPGA vs. FPGA Design Methodologies

Namit Varma, senior director of Achronix’s India Technology Center, discusses the differences between discrete and embedded FPGAs.

Embedded Computing Design Interview with Steve Mensor at Arm TechCon 2018

Brandon Lewis, Editor-in-Chief of Embedded Computing Design sits down with Achronix VP of Marketing, Steve Mensor, to discuss how to deal the growing volume of data that will require to be processed to drive the next wave of AI applications.

Steve Mensor at ArmTechCon 2018

Steve Mensor presents at ArmTechCon 2018. Topic: “Accelerate your Arm-based SoC with Speedcore eFPGA IP”

Robert Blake at the CASPA 2018 Annual Conference

Robert Blake presenting at the CASPA 2018 Annual Conference. Topic: "Addressing AI/ML Hardware Challenges."

Achronix Speedcore Gen4 eFPGA IP for AI/ML and Networking Hardware Acceleration

Steve Mensor, VP of Marketing at Achronix previews the coming announcement of the next-generation Speedcore architecture.