The Speedster22i PCIe Accelerator-6D card offers the highest memory bandwidth for PCIe acceleration applications. On the card is the Speedster22i HD1000 FPGA, which connects six independent memory controllers allowing for up to 192 GB of memory and 690 Gbps of memory bandwidth. Each DDR3 controller runs at 1,600 MT/s and connects to two SODIMMs allowing for single, dual and quad-rank SODIMM and SORDIMM operation. The board also has four QSFP+ connectors for 10G/40G Ethernet connectivity and supports PCIe Gen3 ×8 operation. Because the controllers for the DDR3, Ethernet and PCIe interfaces are implemented as hard blocks inside the HD1000 FPGA, valuable resources inside the FPGA are not needed to implement these functions. In addition, the hard controllers eliminate the challenge of trying to close timing on designs based on soft controller implementations of high-performance interface protocols.

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Sustainable, high-bandwidth functionality is critical for high-performance computing (HPC) applications. High-bandwidth functionality is measured by how fast the system can process data, but is limited by the performance of its slowest interface. The Achronix PCIe Accelerator-6D Board exceeds the system bandwidth of all other FPGA-based PCIe cards with its 160 Gbps of available bandwidth through the four QSFP+ connectors and 690 Gbps of bandwidth to the off-chip DDR3 memory.


Typical Applications

  • Data analytics
  • Data mining
  • Machine learning
  • Network acceleration
  • System modeling
  • Packet QoE/QoS monitoring
  • Cyber security and DPI


  • 4× QSFP+ cages for 4× 40G Ethernet or 16× 10G Ethernet (with breakout connector)
  • Full length, PCI Express pluggable form factor: Gen3 ×8, for 64 Gbps throughput
  • Support for twelve DDR3 SODIMMs (2 modules per controller) providing up to 690 Gbps total bandwidth
  • Programmable clock sources and clock synthesizers
  • Simple USB interface that supports JTAG, CPU and SPI configuration modes
  • SPI EEPROM for FPGA configuration

HD1000 On-board FPGA

  • Achronix HD1000 FPGA built on 22-nm process technology
  • 700,000 programmable look-up tables (LUTs)
  • 86 Mb of on-chip, embedded memory
  • 756 28 × 28 multiply/accumulate blocks
  • Six hard DDR3 controllers: up to ×72 wide at 1,600 MT/s


  • Part number – ACX-KIT-HD1000-PCIE
  • Price – $7,500

Design Methodology

The HD1000 FPGA functionality is designed using the Achronix CAD Environment (ACE) software development tools. ACE is a full-featured FPGA design environment that delivers best-in-class quality of results (QoR) for performance, area and compile times. The ACE design tool suite includes Synplify Pro from Synopsys for RTL synthesis. ACE takes the synthesized design netlist and provides placement, routing, timing analysis, bitstream generation and FPGA configuration. For verification, ACE supports multiple industry-standard simulators and includes Snapshot™ logic analyzer for real-time, on-chip design debugging.

The PCIe Accelerator Card includes a one-year license for both ACE and Synplify Pro for Achronix.