Namit Varma, senior director of Achronix’s India Technology Center, explains how to time an eFPGA, what can go wrong, what are the different clocking scenarios, and what impact variation has on the process.

Released: 8/02/2018 - Tags: [tech talk] [speedcore]

Achronix Vice President of Marketing, Steve Mensor, speaking at DAC 2018 in San Francisco.

Released: 7/27/2018 - Tags: [speedcore] [DAC]

Achronix Systems Architect, Kent Orthner, speaking at DAC 2018 in San Francisco.

Released: 7/27/2018 - Tags: [speedcore] [DAC]

Mike Fitton, Senior Director, Strategic Planning, Achronix discusses the role of eFPGAs in 5G infrastructure at the IP SoC Days 2018, Santa Clara, USA.on April 5th, 2018

Released: 4/05/2018 - Tags: [interview] [speedcore] [5G]

Achronix Speedcore eFPGA IP opens new opportunities for companies looking to integrate embedded FPGA technology into their ASIC or SOC. Speedcore IP is a high-performance, customizable programmable fabric, allowing customers to define the amount of logic, memory, DSP plus their own custom blocks to fit their application requirements. This video demonstrates a validation platform for this game-changing technology.

Released: 1/16/2018 - Tags: [demo] [speedcore]