Achronix has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next- generation FPGAs devices. Fabricated on TSMC’s 7nm FinFET process technology, these 112 Gbps SerDes blocks provide true multi-standard support for a wide range of digital serial communications standards with data rates ranging from 1 Gbps to 112 Gbps.
Kent Orthner, system architect at Achronix, talks with Semiconductor Engineering about how to program an embedded FPGA and what’s different for ASIC engineers.
Released: 11/02/2017 - Tags: [tech talk]
Chris Pelosi, vice president of hardware engineering at Achronix, talks with Semiconductor Engineering about how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs.
Released: 10/05/2017 - Tags: [tech talk]