Achronix has completed testing and is now demonstrating the 112 Gbps SerDes that will be used in its next- generation FPGAs devices. Fabricated on TSMC’s 7nm FinFET process technology, these 112 Gbps SerDes blocks provide true multi-standard support for a wide range of digital serial communications standards with data rates ranging from 1 Gbps to 112 Gbps.
Achronix Speedcore eFPGA IP opens new opportunities for companies looking to integrate embedded FPGA technology into their ASIC or SOC. Speedcore IP is a high-performance, customizable programmable fabric, allowing customers to define the amount of logic, memory, DSP plus their own custom blocks to fit their application requirements. This video demonstrates a validation platform for this game-changing technology.
Kent Orthner, system architect at Achronix, talks with Semiconductor Engineering about how to program an embedded FPGA and what’s different for ASIC engineers.
Released: 11/02/2017 - Tags: [tech talk]
Chris Pelosi, vice president of hardware engineering at Achronix, talks with Semiconductor Engineering about how to verify an embedded FPGA, and how that compares with verification of discrete FPGAs and ASICs.
Released: 10/05/2017 - Tags: [tech talk]
Achronix’s Volkan Oktem talks with Semiconductor Engineering about design for test using embedded FPGAs, including how to plan for coverage and how much it will cost.