The Speedster22i HD1000 Development Kit (ACX -KIT-HD1000-100G) from Achronix contains the world’s first 22-nm programmable logic device — the Speedster22i HD1000. The HD1000 development board is optimized for development of networking and communication sub-systems — with 100 Gbps throughput, and offers the appropriate ports and memory capacity for these functions.

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HD1000 Development Board Features

  • HD1000 22-nm FPGA (see below for FPGA details)
  • CFP cage for 100GE line interface
    • Adaptable to 2 × 40GE or 10 × 10GE
  • Interlaken interface (AirMax connector pair)
    • 120 Gbps to companion board/system
  • PCI Express pluggable form factor
    • Gen3 ×8, for 64 Gbps throughput
  • Six SMAs (Tx, Rx, clk) for generic SerDes access
  • DDR3 module: 4 GB at 1.866 GT/s
  • Additional memories:
    • DDR3: 2Gb @ 933 MHz,
    • (2) RLDRAM3: 576Mb @ 933 MHz
    • QDR2+: 72Mb @ 933 MHz
  • FMC expansion port (HPC)
    • Ten SerDes lanes at 10 Gbps
    • Up to 160 signals (or 80 differential) at 1.6 Gbps
  • Atmel Microcontroller for control and management
  • Power supply modules
  • Power on reset circuitry
  • Oscillators/crystals/clock modules and synthesizers
  • Power and temperature measurement
  • JTAG interface
  • SPI header for EEPROM access
  • EEPROM for device configuration
  • LEDs, switches, headers

HD1000 Device Features

  • First 22-nm FPGA (performance, power, cost)
  • 1 million equivalent LUTs (700k LUTs + hardened IP)
  • 86 Mbit on-chip memory (82 Mb BRAM, 4Mb LRAM)
  • 756 28 × 28 multiply/accumulate blocks
  • 960 programmable user I/O
  • 64 SerDes lanes (1 to 12.75 Gbps)
  • Hard MACs: 100GE, 40GE, 10GE
  • Hard Interlaken ports: 120Gbps
  • Hard PCI Express Gen3 ×8
  • Hard DDR3 controllers: six ×72 at 1866 Mbps
  • Low power consumption
    • 22-nm Intel Tri-Gate transistor (low leakage)
    • Hardened IP

HD1000 Development Kit Includes

  • HD1000 Development Board
  • Bitporter programming pod
  • ACE software license
  • Cables and connectors

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