Director, Post Silicon Validation & Characterization (6410-1014)

Job Title

Director, Post Silicon Validation & Characterization (6410-1014)

Systems Engineering
Santa Clara, CA

Achronix Semiconductor Corporation is a fabless semiconductor corporation based in Santa Clara, California, offering high-performance FPGA solutions. Achronix is the only supplier to have both high-performance and high-density standalone FPGAs and embedded FPGA (eFPGA) solutions in high-volume production. Achronix's FPGA and eFPGA IP offerings are further enhanced by ready-to-use PCIe accelerator cards targeting AI, ML, networking and data center applications. All of Achronix's products are supported by best-in-class EDA software tools.

Position Profile Name: Director, Post Silicon Validation & Characterization

Requisition No.: 6410-1014

Type of Position: Regular, Exempt

Reports to: VP of Systems Engineering

Location: Santa Clara, California


We are looking for a dynamic team leader focused on post-silicon validation and

characterization of Achronix’s 7nm FPGAs. These FPGAs feature very high bandwidth

interfaces like 112Gbps PAM4 SerDes and 16Gbps GDDR6 memory, as well as DDR4 and

DDR5. The successful candidate will lead collaboration across hardware, software, applications

and systems teams to analyze, stress test and debug Achronix FPGA products to ensure the

product fulfills our customer needs and expectations by meeting all requirements and


Job Description/Responsibilities

The successful candidate will

  • Lead a team of Achronix engineers responsible for post-silicon validation and characterization of high-end semiconductor interfaces, tasked with:
    • Producing detailed test plans based on specifications, outlining validation and characterization experiments and procedures,
    • Selection, acquisition and set-up of required test equipment and software, leveraging automation wherever possible,
    • Test plan execution across required parameters of process, voltage and temperature
    • Analysis of results and measurements, developing visualizations to assist in deeper understanding of data,
    • Identification and diagnostics of test escapes and outliers,
    • Compilation of detailed silicon characterization reports reflecting tests, conditions, pass-fail criteria and results,
    • Engaging in the bring-up and debug of new FPGA products,
    • Interoperability and compliance certification of standard protocols including PCIe Gen5 and 400Gbps Ethernet
    • Interoperability validation of high-speed external memory interfaces including GDDR6 and DDR4 and DDR5,
    • Contribution to parametric yield enhancement,
    • Developing FPGA hardware debug designs experiments,
    • Collaborating with 3rd party IP vendors to maximize performance and yield .
  • Supervise, coordinate and participate in execution of these tasks.
  • Define team roles, recruit team members based on those roles.
  • Professional development of the team, preparing them for future technologies such as High-Bandwidth Memory (HBM2e/3)
  • Collaborate with hardware and software teams to resolve hardware issues and optimize results
  • Collaborate with operations team to optimize parametric yield from high volume ATE tests
Minimum Qualifications, Experience and Skills

Minimum Qualifications, Experience and Skills:

  • 10+ Years of experience in the discipline of Silicon Validation and Characterization
  • Proven record of definition of detailed bring up, validation and characterization plans and procedures
  • Deep understanding of lab automation, including MATLAB and/or LabView, scripting languages such as python, perl and TCL
  • Proficient with data collection and organization tools and methods, as well as data and statistical analysis using tools like JMP and Excel
  • Proficient with test and measurement equipment – high-bandwidth Oscilloscopes, BERTs, serial and memory protocol analyzers and exercisers
  • Expert in high-bandwidth measurement setup and configuration, such as JTOL measurements
  • Familiar with high-end serial protocols: PCIe Gen3/4/5, 100/200/400Gbps Ethernet
  • Familiar with high speed external memory interfaces, as well as serial protocols
  • Familiar with high-end memory protocols: DDR4/5
  • Deep knowledge of PLLs and IO standards
  • Good understanding of architectures of SerDes, PLL, memory PHYs and circuit design techniques
  • Profound understanding of signal integrity and power integrity aspects of high speed interfaces, packages, PCBs and measurement equipment
  • Experience with and expertise in all aspects of FPGA design and implementation
  • Be a great team player and mentor
  • Excellent verbal communication skills
  • Strong technical writing skills
Nice to have
  • Experience with one or more design simulators: VCS, Questasim, Riviera, Incisive
  • Experience with designing with FPGA parts and design flows like Xilinx Vivado/Vitis, Intel Quartus, Achronix ACE etc.
  • Experience with high bandwidth memory interfaces: GDDR6, HBM2e/3
  • MSEE or BSEE preferred