- Define and execute device characterization activities for high-speed serial interfaces up to 56 Gbaud data rates.
- Characterize both transmit and receive interfaces using standards-defined methodologies.
- Develop automation for test equipment using Python and/or TCL to support bring-up and characterization.
- Design, synthesize, and compile FPGA logic to support characterization of various device interfaces.
- Support applications teams and third-party vendors in providing guidance on Achronix device high-speed interface and memory configuration and use.
- Support board-level configuration circuits and options for the FPGA.
- Experience with the characterization of SerDes and high-speed serial interfaces.
- Experience with electronic test equipment, such as oscilloscopes, BERTs, TDRs, etc.
- Working knowledge of signal and power integrity principles as applied to high-speed serial interface design on PCBs.
- Experience with de-embedding PCB traces using measured S-parameters and vendor application software is a plus.
- Experience with software automation of test equipment using TCL and/or Python is a strong plus.
- Knowledge of PAM4 electrical coding a plus.
- Knowledge of SQL databases for characterization data storage/analysis is a plus.
- Experience developing FPGA logic (Verilog / synthesis) a strong plus.
- Good communication skills and ability to multi-task.
- At least 5 years’ experience working on PCB design, board bring-up, and system-level debug
- Bachelor’s or Master’s degree in EE, CE or equivalent work experience.
Mid-Level Board Design/SI/Systems Engineer (6410-1006)
Type of Position
Manager, Systems Engineering Hardware
Santa Clara, California