Achronix is a privately held fabless corporation based in Santa Clara, California and offers high-performance FPGA solutions. Achronix's history is one of pushing the boundaries in the high-performance FPGA market. Achronix offerings include programmable FPGA fabrics, discrete high-performance and high-density FPGAs with hardwired system-level blocks, data center and HPC hardware accelerator boards, and best-in-class EDA software supporting all Achronix products.
|Position Profile Name:||SerDes and SI and PI Applications Engineer|
|Type of Position:||Regular, Exempt|
|Reports to:||Sr. Director of Product Applications|
|Location:||Santa Clara, California|
- Ownership of the 112G SerDes PMA and PCS configurations for all Achronix products, with the immediate focus being the Speedster7t FPGA family.
- Drive cross-functional bring-up, validation, characterization, support and documentation efforts of the SerDes made available on the Speedster7t devices and boards.
- Support engineering teams and third-party vendors in running pre-Silicon SI/PI simulations to ensure that target operation specs can be met at the die, package and board level, and collect data post-Silicon to validate findings.
- Work with the Achronix software team to implement and verify appropriate the SerDes macros/configurations for ACE users.
- Generate bring-up and reference designs, including simulation support, to showcase SerDes operation, loss profiles and capabilities at different data rates.
- Provide a high-level of technical support to resolve challenging customer issues with a focus on, but not limited to, SerDes and SI/PI.
- Participate in road-mapping and planning discussions for SerDes and SI/PI in future Achronix products.
- Expert in 112G SerDes PMA and PCS architectures and applications, with PAM4 and NRZ implementations.
- Knowledge of protocol IP – specifically PCIe Gen3/4/CCIX and 10G/40G/100G/400G Ethernet, and how SerDes need to be set up to work in such cases.
- Strong understanding of signal integrity and power integrity concepts, specifically as they pertain to SerDes implementation and verification at the die, package and board-level.
- Proficient in technical writing, including characterization reports, user guides, test/verification plans and spreadsheet based analyses.
- Experience with FPGA implementations and programming, specifically pertaining to SerDes and protocols.
- Good communication skills and ability to multi-task.
Education and Experience
- Bachelor’s or Master’s degree in EE, CE or equivalent work experience
- At least five years’ experience working on SerDes PMA/PCS bring-up, validation, characterization and debug.
- Expert with lab test equipment, specifically those needed for SerDes validation and characterization – oscilloscopes, function generators, logic analyzers, BERTs, backplanes, etc.