Achronix is a privately held fabless corporation based in Santa Clara, California and offers high-performance FPGA solutions. Achronix's history is one of pushing the boundaries in the high-performance FPGA market. Achronix offerings include programmable FPGA fabrics, discrete high-performance and high-density FPGAs with hardwired system-level blocks, data center and HPC hardware accelerator boards, and best-in-class EDA software supporting all Achronix products.

Position Profile Name: Memory Interfaces Applications Engineer
Requisition No.: 7800-1006
Type of Position: Regular, Exempt
Reports to: Sr. Director of Product Applications
Location: Santa Clara, California

Job Description/Responsibilities

  • Full ownership of the memory interface solutions for all Achronix products, with the immediate focus being the Speedster7t FPGA family.
  • Drive cross-functional bring-up, validation, characterization, support and documentation efforts of the DDR4 and GDDR6 solutions on the Speedster7t devices and boards.
  • Ensure and publish interoperability results for Achronix memory interfaces across major vendors and work with customers to deploy similar solutions on their own systems.
  • Work with the Achronix software team to implement and verify appropriate memory interface macros and configurations for ACE users.
  • Generate bring-up and reference designs, including simulation support, to highlight memory interface use-models and demonstrate performance to customers.
  • Provide a high-level of technical support to resolve challenging customer issues with a focus on, but not limited to, memory interfaces.
  • Participate in road-mapping and planning discussions for memory interface solutions in future Achronix products.

Required Skills

  • Expert in DDR3/DDR4 and GDDR6 memory interface protocols (PHY and Controller). Technical knowledge of HBM and HMC is also highly desirable.
  • Memory interface protocol expertise such as QDRII+/IV and RLDRAM3/4 would be a plus.
  • Strong understanding of signal integrity and power integrity concepts, specifically as they pertain to memory interface implementation and verification at the die, package and board-level.
  • Proficient in technical writing, including characterization reports, test/verification plans and spreadsheet based analyses.
  • Strong logic design and verification background with experience in STA.
  • Experience with FPGA implementations and programming, specifically pertaining to memory interfaces.
  • Verilog expertise; System Verilog and VHDL knowledge is a plus.
  • Good communication skills and ability to multi-task.

Education and Experience

  • Bachelor’s or Master’s degree in EE, CE or equivalent work experience
  • At least five  years’ experience working on memory interface bring-up, validation and debug, including DDR3, DDR4 and HBM.
  • Expert with lab test equipment, specifically those needed for memory interface validation and characterization – oscilloscopes, function generators, logic analyzers, DIMM/component memory interposers, etc.
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