Release date: October 10, 2019
The Achronix Speedster7t macro cell library provides the user with building blocks that may be instantiated into the user’s design. These macros provide access to low-level fabric primitives, complex I/O block, and higher level design components. Each library element entry describes the operation of the macro as well as any parameters that must be initialized. Verilog and VHDL templates are also provided to aide in the implementation of the user’s design.