Release date: December 07, 2017

This user guide details the clock structure for a Speedcore instance, covering the global core clock network, and interface clock networks. This guide also covers various clocking scenarios and their impact on timing closure.
ACHRONIX ANNOUNCEMENTS

Speedcore eFPGA Technology for SoC Acceleration.

ACHRONIX ANNOUNCEMENTS

Achronix Revenues to Grow 700% Year over Year