Webinars

Learn about Achronix technology from our experts.
Webinar Title Published Date
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Embedded FPGA and FPGA: The Fabric for Optimized Machine Learning

Embedded FPGAs (eFPGAs) bring the power and flexibility of programmable logic to ASICs and SoCs. With eFPGAs, machine learning (ML) can be integrated in new form-factors such as mobile edge compute, IoT aggregation and SmartNIC.

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Accelerate Data Processing Algorithms using FPGAs with 2D Network-on-Chip

This novel architecture has hundreds of NoC-access-points located throughout the FPGA core that can access off-chip memories and any of the high-speed PCI Express ports. This family of FPGAs also include specialized modes for the high-speed 400G Ethernet ports.

In addition, you will see how data can be streamed across the FPGA fabric using 512 Gbps NoC channels located throughout the FPGA processing array.

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Learn How FPGA-based PCIe Cards Can Accelerate Your Applications

In this webinar, you will learn how to leverage FPGA-based PCIe accelerator cards to achieve 10-100x increase in performance vs. CPU-only based solutions for compute, network, storage and sensor processing applications.

See how off-the-shelf FPGA-based accelerator cards can deliver increased efficiency and operational agility while reducing your time to market.

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Learn About the New Block Floating Point Arithmetic Unit for Processing AI/ML Workloads in Speedster7t FPGA

Block floating point (BFP) is a hybrid of floating-point and fixed-point arithmetic where a block of data is assigned a common exponent. Learn about the only FPGA with machine learning processors that can deliver native BFP capabilities with higher performance and lower power consumption compared to traditional FPGA DSP blocks. 

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Maximize Hardware Assurance with eFPGA IP

In this webinar you will learn how to maximize hardware assurance (HwA) for critical IP in the semiconductor manufacturing process using eFPGA technology. Hardware assurance is of critical importance for manufacturing semiconductors in applications with heightened security requirements. See how eFPGAs can help to reduce the risk of critical IP getting compromised during the entire life cycle of the ASIC.

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Benefits of FPGAs & eFPGA IP in Futureproofing Compute Acceleration

In the quest to accelerate and optimize today’s computing challenges such as AI inference, our system designs have to be flexible above all else. At the confluence of speed and flexibility are today’s new FPGAs and e-FPGA IP. In this episode of Chalk Talk, Amelia Dalton chats with former Achronix Sr. Director of Strategy and Planning about how to design systems to be both fast and future-proof using FPGA and e-FPGA technology.

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Maximize Performance Using FPGAs with PCIe Gen5 Interfaces

In this webinar, you will learn how to maximize design performance using FPGAs with embedded PCIe Gen5 interfaces. You’ll see why, in addition to high-speed connectivity, you need the ability to process incoming high-bandwidth data to accelerate application performance. 

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Autonomous Vehicles: We’re Already There (Sort Of)

Depending on your perspective, autonomous vehicles have been with us for quite some time, or they’re not even close to being here. The former is true in some cases where trials are being run for both passenger vehicles and for trucks. The latter is more the case when you look at mainstream driving down our crowded city streets.

This webinar will look at the components that are needed, both software and hardware, to close the gap between “almost here” and “they’re everywhere.”

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Accelerating to 112 Gbps PAM4 Webinar: A Real-World FPGA Implementation

This webinar hosted by Achronix and Samtec will describe how to design 112G SerDes links with Achronix's Speedster7t FPGA and Samtec interconnect technology.

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Best Practices in Designing Rad-Hard and Trusted SoCs with eFPGA IP Webinar

Designing high-performance SoCs for data acceleration applications that require high levels of security and radiation tolerance is a significant challenge for the defense industry. This webinar will provide a technical discussion on the challenges and best practices involved in designing high-performance eFPGA IP for integration into custom rad-hard SoCs.