Blog Posts

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  • 2018
  • 2017
  • Visitors to CES 2018 will Experience the Future of Transportation January 5, 2018 by Alok Sanghavi

    When visitors to CES 2018 want to travel to the Las Vegas Convention Center across town, it will likely be in a fully autonomous vehicle from Lyft getting them there. While this futurist trip will certainly be a first for many riders, this type of point-to-point travel will soon become commonplace. But questions concerning the safety of autonomous vehicles remain. For Lyft’s CES demonstration, a backup pilot will be in the driver’s seat for added safety. Transitioning from pilot-assisted to fully autonomous vehicles heightens the role of vehicle safety. The more the on-board network takes control of the vehicle, the more drivers and passengers like …

    Why Designers Need to Look Towards Combining CPUs with FPGA Fabrics November 7, 2017 by Alok Sanghavi

    Given that the industry is beginning to reach the limits of what can physically and economically be achieved through further shrinkage of process geometries, reducing feature size and increasing transistor counts is no longer achieving the same result it once did. Instead the industry is, quite rightly, focusing on fundamentally new system architectures and making better use of available silicon through radical rethinking of how tasks are achieved within each device. As we enter this new era in technology, the integration of the FPGA fabric with CPUs in the form of embedded FPGAs becomes an attractive solution. Although both FPGAs and CPUs use a mix …

    Check out our Recent Video on the Basics of eFPGA Acceleration September 29, 2017 by Alok Sanghavi

    Our existing customers ask us some pretty big questions: “How can this technology implement a step-change in my specific process? How can Speedcore IP be integrated in my SoC? How can you increase the performance of my ASIC?” We revel in answering such questions. However, when we first meet with a company interested in our embedded FPGA (eFPGA) IP, often the question is very simply, “At the most basic level, what can it do for me?” This question may be the most important one we’ll ever answer for them. A few months ago Achronix’s systems architect Kent Orthner made a short video with Ed Sperling, …

    The Big Trend at Hot Chips 2017? Hybrid Architectures Incorporating FPGA Fabrics for AI and Machine Learning Applications September 1, 2017 by Randy Fish

    Achronix was delighted to attend the Hot Chips event in Cupertino once again this August. This year saw a bumper turnout, with some very fascinating speakers providing some great insights into the industry. The Achronix team had a chance to meet with many talented people in the industry, swap the usual industry gossip, and pick up several highly promising new business leads. One very noticeable trend at this year’s conference was the emphasis placed on development of hybrid architectures incorporating FPGA fabrics in order to deliver ASIC-like data center acceleration. Firstly, Microsoft announced Project Brainwave, an acceleration platform for deep learning and AI applications. This …

    Closing Timing with Speedcore eFPGAs Made Easy August 3, 2017 by Volkan Oktem

    Speedcore eFPGAs are embeddable IP that include look-up tables, memories, and DSP building blocks, allowing designers to add a programmable logic fabric to their SoC. The Speedcore IP can be configured to any size as dictated by the end application. The SoC supplier defines the number of LUTs, memory resources, and DSP64 blocks for their Speedcore instance. A short time later, Achronix delivers the IP as a GDS plus supporting libraries, models and documentation. Once this custom Speedcore block is embedded in the SoC, the end user can use the Achronix CAD Environment (ACE) design tools which are traditional FPGA design tools and workflows to …