Speedster®22i HD devices are the world’s highest-density FPGAs, offering up to 1.7 million effective LUTs and 138 megabits of embedded RAM. Built on Intel’s 22nm 3-D Tri-Gate FinFET process, Speedster22i HD devices are SRAM-based and fully-reconfigurable, and offer a familiar fabric architecture made up of synchronous look-up tables (LUTs), flops, muxes, carry chains, memories and multipliers.
The I/O frame contains dedicated hard IP, configurable I/Os, SerDes, clock generator blocks with phase lock loops (PLLs), and the device configuration logic.
Speedster22i FPGAs contain up to sixty four (64) lanes of 12.75 Gbps SerDes, up to sixteen (16) lanes of 28 Gbps SerDes and up to 996 high‐speed general purpose I/Os.
Additional dedicated hard IP includes up to six (6) DDR3 PHY and controllers, up to forty eight (48) 10 gigabit Ethernet controllers, or up to twelve (12) 40 gigabit Ethernet controllers or up to four (4) 100 gigabit Ethernet controllers. There are also are up to four (4) Interlaken controllers and two (2) PCI Express controllers, all available as embedded hard IP which use none of the reconfigurable logic resources and achieve maximum performance without the need for timing closure or optimization.